US 12,477,816 B2
Monolithic component comprising a gallium nitride power transistor
Mathieu Rouviere, Tours (FR); Arnaud Yvon, Saint-Cyr sur Loire (FR); Mohamed Saadna, Saint Cyr-sur-Loire (FR); and Vladimir Scarpa, Dusseldorf (DE)
Assigned to STMICROELECTRONICS APPLICATION GMBH, Aschheim-Dornach (DE); and STMICROELECTRONICS (TOURS) SAS, Tours (FR)
Filed by STMICROELECTRONICS APPLICATION GMBH, Aschheim-Dornach (DE); and STMICROELECTRONICS (TOURS) SAS, Tours (FR)
Filed on Sep. 29, 2023, as Appl. No. 18/478,465.
Application 18/478,465 is a division of application No. 16/897,205, filed on Jun. 9, 2020, granted, now 11,810,911.
Claims priority of application No. 1906589 (FR), filed on Jun. 19, 2019.
Prior Publication US 2024/0021604 A1, Jan. 18, 2024
Int. Cl. H01L 27/06 (2006.01); H01L 21/02 (2006.01); H10D 8/01 (2025.01); H10D 8/60 (2025.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/85 (2025.01); H10D 64/00 (2025.01); H10D 84/01 (2025.01); H10D 84/05 (2025.01); H10D 84/80 (2025.01)
CPC H10D 84/811 (2025.01) [H01L 21/0254 (2013.01); H10D 8/051 (2025.01); H10D 8/60 (2025.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/8503 (2025.01); H10D 64/00 (2025.01); H10D 84/01 (2025.01); H10D 84/05 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
an electronic component that includes:
gallium nitride substrate;
an aluminum-gallium nitride layer;
first and second connection terminals on the gallium nitride substrate;
a field-effect power transistor on the gallium nitride substrate and including a gate structure, source, and drain, wherein the gate structure is directly on the gallium nitride substrate and includes a gate dielectric layer and a gate electrode;
a passivation layer formed on the gate structure of the field-effect power transistor;
a first Schottky diode formed on the gallium nitride substrate and coupled between and to both the first connection terminal and the gate electrode of the field-effect power transistor; and
a second Schottky diode formed on the gallium nitride substrate and coupled between and to both the second connection terminal and the gate electrode of the field-effect power transistor; and
a first capacitor coupled between and to both the first connection terminal and the source of the field-effect power transistor, the source and drain of the field-effect power transistor and anode and cathode terminals of each of the first Schottky diode and the second Schottky diode are in respective trenches extending in the passivation layer to the aluminum-gallium nitride layer.