US 12,477,767 B2
Semiconductor device and method
Bo-Feng Young, Taipei (TW); Po-Chi Wu, Zhubei (TW); and Che-Cheng Chang, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Sep. 25, 2023, as Appl. No. 18/473,721.
Application 18/473,721 is a continuation of application No. 17/853,104, filed on Jun. 29, 2022, granted, now 11,784,242.
Application 17/853,104 is a continuation of application No. 16/871,984, filed on May 11, 2020, granted, now 11,387,351, issued on Jul. 12, 2022.
Application 16/871,984 is a continuation of application No. 16/390,940, filed on Apr. 22, 2019, granted, now 10,665,700, issued on May 26, 2020.
Application 16/390,940 is a continuation of application No. 15/638,738, filed on Jun. 30, 2017, granted, now 10,269,940, issued on Apr. 23, 2019.
Prior Publication US 2024/0030319 A1, Jan. 25, 2024
Int. Cl. H10D 30/01 (2025.01); H01L 21/3065 (2006.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/17 (2025.01); H10D 64/01 (2025.01); H10D 62/822 (2025.01)
CPC H10D 30/0245 (2025.01) [H01L 21/3065 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 30/797 (2025.01); H10D 62/292 (2025.01); H10D 64/017 (2025.01); H10D 62/822 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor fin over a substrate;
a gate stack overlying a channel region within the semiconductor fin, the channel region having a width no larger than about 40 nm; and
a plurality of openings extending into the semiconductor fin on opposite sides of the gate stack, each of the plurality of openings extending into the semiconductor fin a first distance of between about 300 Å and about 450 Å, wherein a difference between two of the plurality of openings is between −3 nm and 3 nm.