| CPC H10B 63/845 (2023.02) [H10B 63/34 (2023.02)] | 20 Claims |

|
1. A variable resistance memory device comprising:
a resistance change layer comprising a metal oxide that includes a first metal element and a second metal element, the metal oxide having an oxygen deficient ratio greater than or equal to about 9%;
a semiconductor layer on the resistance change layer;
a gate insulating layer on the semiconductor layer; and
a plurality of electrodes on the gate insulating layer to be apart from each other.
|