US 12,477,718 B2
Semiconductor device and semiconductor memory device each having portions of oxide semiconductor between gate insulating layer and electrodes
Akifumi Gawase, Kuwana Mie (JP); Ha Hoang, Kuwana Mie (JP); Atsuko Sakata, Yokkaichi Mie (JP); Yuta Kamiya, Nagoya Aichi (JP); Kazuhiro Matsuo, Kuwana Mie (JP); Keiichi Sawa, Yokkaichi Mie (JP); Kota Takahashi, Yokkaichi Mie (JP); Kenichiro Toratani, Yokkaichi Mie (JP); and Yimin Liu, Yokkaichi Mie (JP)
Assigned to Kioxia Coporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Jun. 15, 2022, as Appl. No. 17/841,129.
Claims priority of application No. 2021-205699 (JP), filed on Dec. 20, 2021.
Prior Publication US 2023/0200050 A1, Jun. 22, 2023
Int. Cl. H10B 12/00 (2023.01); H10D 30/67 (2025.01); H10D 99/00 (2025.01)
CPC H10B 12/30 (2023.02) [H10B 12/05 (2023.02); H10D 30/6728 (2025.01); H10D 30/6755 (2025.01); H10D 99/00 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first electrode;
a second electrode;
an oxide semiconductor layer provided between the first electrode and the second electrode;
a gate electrode surrounding at least a part of the oxide semiconductor layer;
a gate insulating layer, at least a part of the gate insulating layer provided between the gate electrode and the oxide semiconductor layer;
a first insulating layer provided between the first electrode and the gate electrode; and
a second insulating layer provided between the second electrode and the gate electrode,
wherein, in a cross section parallel to a first direction from the first electrode to the second electrode and including the oxide semiconductor layer, a direction connecting a first end of an interface between the first electrode and the first insulating layer on a side of the oxide semiconductor layer and a second end of an interface between the second electrode and the second insulating layer on the side of the oxide semiconductor layer is defined as a second direction,
in the cross section, a first portion of the oxide semiconductor layer is provided between the gate insulating layer and the first electrode in the second direction, and
in the cross section, a second portion of the oxide semiconductor layer is provided between the gate insulating layer and the second electrode in the second direction.