| CPC H04N 25/683 (2023.01) [G06T 5/70 (2024.01); H04N 1/60 (2013.01); H04N 9/73 (2013.01); H04N 23/81 (2023.01); H04N 23/843 (2023.01); H04N 23/88 (2023.01); H04N 25/61 (2023.01); H04N 25/63 (2023.01)] | 20 Claims |

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1. A display control apparatus, comprising:
a display control circuit;
a hardware-implemented Mini image signal processing (ISP) processor, configured to:
obtain original image data of a camera sensing component in real time,
obtain first image data by performing exactly four operations on the original image data, the four operations consisting of a lens correction, a defective pixel correction, a noise filtering and a format conversion, and
send the first image data to a display control circuit; and
a compensation ISP processor, configured to obtain second image data by performing a lens correction, a defective pixel correction, a noise filtering, a format conversion and a first processing step on the original image data, and to send the second image data to the display control circuit; wherein,
the display control circuit is configured to:
process the first image data to obtain first image data for displaying before receiving the second image data, and control a display screen to display according to the first image data for displaying; and
process the second image data to obtain second image data for displaying after receiving the second image data, and control the display screen to display according to the second image data for displaying;
wherein the first processing step comprises at least one of:
a black level compensation, a color interpolation, a Bayer noise filtering, a white balance correction, a color correction, a gamma correction, a color space conversion, a color noise filtering and edge enhancement in YUV color space, a color and contrast enhancement, or an automatic exposure control.
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