| CPC H04L 45/26 (2013.01) [H04L 45/745 (2013.01); H04L 47/2416 (2013.01); H04L 49/111 (2022.05)] | 20 Claims |

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1. A system for providing dynamic logical port isolation, the system comprising:
a processor; and
a memory device coupled with the processor, wherein the memory device comprises data stored thereon that, when processed by the processor, enables the processor to:
receive a packet via an ingress port, wherein the packet is associated with a destination address;
determine, based on the ingress port and the destination address associated with the packet, one or more egress ports are authorized to transmit packets both received via the ingress port and associated with the destination address; and
in response to determining the one or more egress ports are authorized to transmit packets both received via the ingress port and associated with the destination address, forward the packet to the destination address via at least one of the one or more egress ports.
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