US 12,476,781 B2
Timing calibration techniques for discrete-time circuits
Huseyin Dinc, Chapel Hill, NC (US); and Ahmed Mohamed Abdelatty Ali, Oak Ridge, NC (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on May 23, 2023, as Appl. No. 18/322,052.
Prior Publication US 2024/0396702 A1, Nov. 28, 2024
Int. Cl. H04L 7/00 (2006.01)
CPC H04L 7/0033 (2013.01) 19 Claims
OG exemplary drawing
 
12. A device for operating a discrete time circuit, comprising:
a sampling block;
a variable delay clock, coupled to the sampling block;
a gain estimator, coupled to the sampling block; and
a delay block, coupled to the gain estimator, wherein an amount of delay of at least one of the delay block and the variable delay clock is based at least in part on a difference in amplitude of a signal sampled in the sampling block at at least two different times;
wherein the amount of delay is based at least in part on satisfying a condition of the discrete time circuit.