| CPC H02M 3/1584 (2013.01) [H02M 3/157 (2013.01); H02M 3/158 (2013.01)] | 3 Claims |
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1. A direct current (DC) converter, comprising a DC conversion circuit, a pulse width modulation (PWM) controller, and a driving circuit, wherein the DC conversion circuit comprises a first switch, a second switch, a third switch, a fourth switch, an inductor, a positive voltage output capacitor and a negative voltage output capacitor, a first end of the first switch is connected to an input voltage, a second end of the first switch is connected to a first end of the inductor, a second end of the inductor is connected to a first end of the third switch, a second end of the third switch is connected to a first end of the positive voltage output capacitor, a second end of the positive voltage output capacitor is connected to a first end of the negative voltage output capacitor, a second end of the negative voltage output capacitor is connected to the first end of the inductor through the fourth switch, the second end of the positive voltage output capacitor and the first end of the negative voltage output capacitor are grounded together, a second end of the second switch is grounded, a first end of the second switch is connected to the second end of the inductor, a load is connected between the first end of the positive voltage output capacitor and the second end of the negative voltage output capacitor;
the PWM controller is configured to alternately output a first state signal and a second state signal every preset cycle when it is determined that a first terminal voltage of the positive voltage output capacitor is equal to a first target voltage and a positive voltage output current is equal to a negative voltage output current, the first state signal is configured to control the first switch and the second switch to turn on synchronously and control the third switch and the fourth switch to turn off synchronously, the second state signal is configured to control the first switch and the second switch to turn off synchronously and control the third switch and the fourth switch to turn on synchronously, and the first target voltage is a working voltage to be reached by the positive voltage output capacitor;
the PWM controller is further configured to output a third state signal for controlling the first switch and the third switch to turn on and controlling the second switch and the fourth switch to turn off when it is determined that the first terminal voltage of the positive voltage output capacitor is less than the first target voltage or the positive voltage output current is greater than the negative voltage output current,
the PWM controller is further configured to output a fourth state signal for controlling the first switch and the third switch to turn off and controlling the second switch and the fourth switch to turn on when it is determined that the first terminal voltage of the positive voltage output capacitor is greater than the first target voltage or the positive voltage output current is less than the negative voltage output current,
wherein an output end of the PWM controller is connected to an input end of the driving circuit, the driving circuit is configured to receive a first pulse signal and a second pulse signal output by the PWM controller;
wherein the driving circuit receives the first pulse signal to output a first signal or a second signal, the driving circuit receives the second pulse signal to output a third signal or a fourth signal, the first signal is configured to control the first switch to turn on, the second signal is configured to control the fourth switch to turn on, the third signal is configured to control the second switch to turn on, and the fourth signal is configured to control the third switch to turn on;
wherein, when the first pulse signal is at a high level, the driving circuit outputs the first signal, when the first pulse signal is at a low level, the driving circuit outputs the second signal, when the second pulse signal is at the high level, the driving circuit outputs the third signal, and when the second pulse signal is at the low level, the driving circuit outputs the fourth signal;
wherein the first state signal is a continuous and equal high-level first pulse signal and high-level second pulse signal, the second state signal is a continuous and equal low-level first pulse signal and continuous low-level second pulse signal, the third state signal is a continuous high-level first pulse signal and low-level second pulse signal, and the fourth state signal is a continuous low-level first pulse signal and high-level second pulse signal,
wherein a first positive voltage divider resistor and a second positive voltage divider resistor are connected in series between the first end and the second end of the positive voltage output capacitor, a first end of the first positive voltage divider resistor is connected to the first end of the positive voltage output capacitor, a second end of the second positive voltage divider resistor is connected to the second end of the positive voltage output capacitor, a second end of the first positive voltage divider resistor is connected to a first end of the second positive voltage divider resistor, a first negative voltage divider resistor and a second negative voltage divider resistor are connected in series between the first end and the second end of the negative voltage output capacitor, a first end of the first negative voltage divider resistor is connected to the first end of the negative voltage output capacitor, a second end of the second negative voltage divider resistor is connected to the second end of the negative voltage output capacitor, a second end of the first negative voltage divider resistor is connected to a first end of the second negative voltage divider resistor, and the DC converter further comprises a positive sampling circuit, a negative sampling circuit, and an intermediate sampling circuit;
the positive sampling circuit is configured to collect a second terminal voltage of the first positive voltage divider resistor;
the negative sampling circuit is configured to collect a second terminal voltage of the first negative voltage divider resistor and convert the second terminal voltage of the first negative voltage divider resistor into a positive voltage to obtain a voltage;
the intermediate sampling circuit is configured to collect a current at the first end of the second switch and convert the current into a voltage signal; and
the DC converter further comprises a clock circuit, the clock circuit is configured to generate a clock signal and input the clock signal to an input end of the PWM controller, the first pulse signal and the second pulse signal outputted by the PWM controller are continuous and identical based on the clock signal, wherein pulse widths of the first pulse signal and the second pulse signal are preset periods.
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