US 12,476,220 B2
Substrate-based package semiconductor device with side wettable flanks
YuJun Zhao, Nijmegen (NL); JinXin Yi, Nijmegen (NL); Yuan Li, Nijmegen (NL); Frank Burmeister, Nijmegen (NL); Jennifer Schuett, Nijmegen (NL); Dicky Tirta Djaja, Nijmegen (NL); and Qingyuan Tang, Nijmegen (NL)
Assigned to Nexperia B.V., Nijmegen (NL)
Filed by NEXPERIA B.V., Nijmegen (NL)
Filed on Nov. 18, 2022, as Appl. No. 17/989,897.
Claims priority of application No. 21208944 (EP), filed on Nov. 18, 2021.
Prior Publication US 2023/0154891 A1, May 18, 2023
Int. Cl. H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01)
CPC H01L 24/97 (2013.01) [H01L 21/78 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/97 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A carrier comprising a plurality of non-singulated substrate-based package semiconductor devices, comprising:
a substrate comprising one or more insulating layers and having an upper surface, a lower surface, and a lower metal layer arranged on the lower surface;
a semiconductor die on which an electric component or circuit is integrated for each substrate-based package semiconductor device, the electronic component or circuit has one or more die terminals, wherein the semiconductor die is mounted on the upper surface of the substrate, and wherein the substrate-based package semiconductor device is configured for being mounted with its lower surface on a further substrate or carrier;
one or more package terminals is at least partially formed using the lower metal layer for each substrate-based package semiconductor device, the one or more package terminals being electrically connected to the one or more die terminals of the semiconductor die of that substrate-based package semiconductor device;
wherein the lowest insulating layer among the one or more insulating layers have cavities arranged near and associated with the one or more package terminals of the plurality of non-singulated substrate-based package semiconductor devices;
an inner wall of the cavities is covered with a conductive body that connects to the respective associated package terminal;
wherein the non-singulated substrate-based package semiconductor devices are separated by a separating region of the substrate; and
wherein the cavities are at least partially formed in the separating region.