US 12,476,218 B2
Semiconductor device manufacturing method
Hiroki Takahashi, Sendai (JP); Tsunehiro Nakajima, Matsumoto (JP); and Takashi Saito, Matsumoto (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed on Jan. 25, 2023, as Appl. No. 18/159,272.
Claims priority of application No. 2022-033151 (JP), filed on Mar. 4, 2022.
Prior Publication US 2023/0282611 A1, Sep. 7, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/07 (2006.01)
CPC H01L 24/83 (2013.01) [H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/95 (2013.01); H01L 25/072 (2013.01); H01L 25/50 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/37147 (2013.01); H01L 2224/37638 (2013.01); H01L 2224/37655 (2013.01); H01L 2224/40225 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73221 (2013.01); H01L 2224/73263 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/83054 (2013.01); H01L 2224/83201 (2013.01); H01L 2224/83395 (2013.01); H01L 2224/83439 (2013.01); H01L 2224/83455 (2013.01); H01L 2224/83463 (2013.01); H01L 2224/83815 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/83948 (2013.01); H01L 2224/95053 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/0132 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/20105 (2013.01); H01L 2924/20106 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device manufacturing method, comprising:
preparing a semiconductor chip, a bonding member, and an insulated circuit board including an insulating plate, a wiring board on a front surface of the insulating plate, and a metal plate on a back surface of the insulating plate;
assembling a semiconductor unit by arranging the semiconductor chip on the wiring board with the bonding member therebetween;
heating the semiconductor unit; and
cooling the semiconductor unit, wherein:
in the heating the semiconductor unit, a heater having a heating surface including a flat surface is used for performing the heating in a state in which a lower surface of the insulated circuit board is placed on the flat surface; and
in the cooling the semiconductor unit, a cooler having a cooling surface including a pair of support portions is used for performing the cooling in a state
in which lower surfaces of a pair of outer regions of the insulated circuit board are respectively placed in contact with the pair of support portions, and
in which a central region between the pair of outer regions of the insulated circuit board is pressed downward so as to be downwardly convex.