US 12,476,150 B2
Critical dimension uniformity (CDU) control method and semiconductor substrate processing system
Hsin-Chih Wang, Zhubei (TW); Yu-Tien Shen, Tainan (TW); Yu-Tse Lai, Zhubei (TW); Chih-Kai Yang, Taipei (TW); Hsiang-Ming Chang, Hsinchu (TW); Chun-Yen Chang, Hsinchu (TW); and Ya-Hui Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 4, 2022, as Appl. No. 17/568,176.
Claims priority of provisional application 63/224,909, filed on Jul. 23, 2021.
Prior Publication US 2023/0023152 A1, Jan. 26, 2023
Int. Cl. H01L 21/66 (2006.01)
CPC H01L 22/12 (2013.01) [H01L 22/26 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A critical dimension uniformity (CDU) control method, comprising:
gathering a first CDU by a first critical dimension (CD) from a first wafer after being processed by a first surface process;
determining a first calibration process based on the first CDU, wherein the determining comprises:
an intra dose correction step for correcting reticle-dependent deviation;
a thru-slit dose sensitivity correction step for correcting time-dependent deviation; and
an inter dose correction step for correcting process-dependent deviation; and
calibrating the first surface process by the first calibration process to determine a second surface process different from the first surface process.