| CPC G06N 10/40 (2022.01) [H03K 17/92 (2013.01)] | 20 Claims |

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1. A method for increasing available qubit energy scale in a hybrid computing system, the hybrid computing system comprising a quantum processor and at least one digital processor, the quantum processor comprising a plurality of qubits and couplers, each qubit having a respective qubit body comprising a loop of superconducting material interrupted by at least one compound-compound Josephson junction (CCJJ), the qubit body communicatively coupled to an inductance tuner (L-tuner), the method executed by the at least one digital processor and comprising:
causing a respective L-tuner of at least a set of qubits to compensate for a coupler inductance loading;
determining a remaining respective L-tuner range for each qubit in the set of qubits;
computing a minimum homogenized inductance across all qubits in the set of qubits from the remaining respective L-tuner range;
causing a respective L-tuner of each qubit in the set of qubits to apply an inductance AL to each qubit in the set of qubits to achieve the minimum homogenized inductance;
computing a first shift in CCJJ bias Δ′CCJJ due to the applied inductance AL; and
causing a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second shift in CCJJ bias Δ″CCJJ to each qubit in the set of qubits to compensate for the first shift in CCJJ bias.
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