US 12,475,284 B2
Integrated circuit generation using an integrated circuit shell
Ryan Macdonald, San Francisco, CA (US); Erik Arthur Danie, Oakland, CA (US); Wesley Waylon Terpstra, San Mateo, CA (US); and Yunsup Lee, Redwood City, CA (US)
Assigned to SiFive, Inc., Santa Clara, CA (US)
Filed by SiFive, Inc., San Mateo, CA (US)
Filed on Nov. 23, 2022, as Appl. No. 17/992,976.
Claims priority of provisional application 63/290,684, filed on Dec. 17, 2021.
Prior Publication US 2023/0195980 A1, Jun. 22, 2023
Int. Cl. G06F 30/31 (2020.01); G06F 30/327 (2020.01)
CPC G06F 30/31 (2020.01) [G06F 30/327 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
generating an integrated circuit core design expressed in a hardware description language, the integrated circuit core design expressing circuitry that describes one or more functions to be included in an application specific integrated circuit (ASIC), wherein the one or more functions have connection points providing first inputs and outputs to the one or more functions; and
querying an integrated circuit shell expressed in a hardware description language, the integrated circuit shell expressing circuitry that describes a limited set of pads to be implemented in the ASIC, the limited set of pads providing second inputs and outputs to the ASIC, wherein the querying determines availability of pads of the limited set of pads to connect to connection points of the one or more functions.