US 12,475,039 B2
Computing system and method for controlling storage device
Shinichi Kanno, Tokyo (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Jul. 19, 2024, as Appl. No. 18/778,029.
Application 18/778,029 is a continuation of application No. 18/138,378, filed on Apr. 24, 2023, granted, now 12,072,796.
Application 18/138,378 is a continuation of application No. 17/475,025, filed on Sep. 14, 2021, granted, now 11,669,444, issued on Jun. 6, 2023.
Application 17/475,025 is a continuation of application No. 16/740,680, filed on Jan. 13, 2020, granted, now 11,151,029, issued on Oct. 19, 2021.
Application 16/740,680 is a continuation of application No. 16/017,195, filed on Jun. 25, 2018, granted, now 10,558,563, issued on Feb. 11, 2020.
Claims priority of application No. 2017-209344 (JP), filed on Oct. 30, 2017.
Prior Publication US 2024/0370366 A1, Nov. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G06F 12/02 (2006.01); G06F 12/0891 (2016.01)
CPC G06F 12/0246 (2013.01) [G06F 3/061 (2013.01); G06F 3/0614 (2013.01); G06F 3/0631 (2013.01); G06F 3/064 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 3/0688 (2013.01); G06F 11/10 (2013.01); G06F 12/0253 (2013.01); G06F 12/0292 (2013.01); G06F 12/0891 (2013.01); G06F 2212/7201 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A storage device comprising:
a control circuit connectable to a host device and including a write operation control unit; and
a plurality of nonvolatile memory dies, each of the plurality of nonvolatile memory dies including a plurality of memory blocks, wherein
the write operation control unit is configured:
to write data to the plurality of memory blocks;
to receive a write request and first data to be written from the host device, the write request designating a first logical address corresponding to the first data and a length of the first data;
in response to receiving the write request, to select a first writable memory block from among the plurality of memory blocks as a write destination block for the first data, and to write the first data to a first physical storage location in the first writable memory block; and
to transmit to the host device the first logical address and a first physical address, the first physical address being indicative of both of the first writable memory block and the first physical storage location, for updating, by the host device, mapping between a logical address and a physical address of the storage device.