US 12,475,031 B2
Very large address space using extended page tables
David Lombard, Los Alamitos, CA (US); Robert Wisniewski, Ossining, NY (US); Douglas Joseph, Leander, TX (US); Matthew Wolf, Oak Ridge, TN (US); Jai Dayal, Aloha, OR (US); James Loo, Brentwood, CA (US); Andrew Thomas Tauferner, Rochester, MN (US); and Rolf Riesen, Forest Grove, OR (US)
Assigned to Samsung Electronics Co., Ltd., Yongin-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Mar. 1, 2024, as Appl. No. 18/593,435.
Claims priority of provisional application 63/452,078, filed on Mar. 14, 2023.
Prior Publication US 2024/0311289 A1, Sep. 19, 2024
Int. Cl. G06F 12/02 (2006.01); G06F 12/1027 (2016.01)
CPC G06F 12/023 (2013.01) [G06F 12/1027 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method to address memory in a plurality of nodes of a distributed memory system, the method comprising:
partitioning the memory in each of the plurality of nodes into one or more memory blocks available for a global memory pool;
combining, in response to a request to address memory in the global memory pool, a global bit stored in a hardware device with a physical address to generate a global virtual address, wherein the global bit indicates whether the memory is local or remote;
translating, using global access tuple (GAT) tables, the global virtual address to a global physical address; and
addressing a memory block of the one or more memory blocks in the global memory pool based on the global physical address.