US 12,474,874 B2
Memory device, memory controller, and memory system including the same
Wontaeck Jung, Hwaseong-si (KR); Bohchang Kim, Suwon-si (KR); Kuihan Ko, Seoul (KR); and Jaeyong Jeong, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 26, 2023, as Appl. No. 18/340,950.
Application 18/340,950 is a continuation of application No. 17/307,317, filed on May 4, 2021, granted, now 11,726,722.
Claims priority of application No. 10-2020-0101395 (KR), filed on Aug. 12, 2020.
Prior Publication US 2023/0333782 A1, Oct. 19, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); H10B 43/27 (2023.01)
CPC G06F 3/0679 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0652 (2013.01); G06F 3/0655 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); H10B 43/27 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a first memory device comprising a plurality of first memory blocks of a same type, each including a plurality of first memory cells stacked in a direction perpendicular to a substrate; and
a memory controller configured to control a memory operation of the first memory device,
wherein the memory controller is configured to designate any one of a plurality of types of memory blocks having different data reliability guarantees to each of the plurality of first memory blocks based on a number of first not-open (N/O) strings in each of the plurality of first memory blocks, and operate the plurality of first memory blocks based on the designation by the memory controller with respect to the plurality of first memory blocks,
wherein each of the first N/O strings has a defect in which a channel is not formed in each of the first N/O strings.