US 12,474,869 B2
Reliable and efficient boot logical unit access
Luca Porzio, Casalnuovo (IT); Rakeshkumar Dayabhai Vaghasiya, Hyderabad (IN); and Roberto Izzi, Caserta (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Feb. 14, 2024, as Appl. No. 18/441,869.
Claims priority of provisional application 63/486,386, filed on Feb. 22, 2023.
Prior Publication US 2024/0281169 A1, Aug. 22, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0605 (2013.01); G06F 3/0632 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a memory device; and
a controller coupled with the memory device and configured to cause the apparatus to:
receive a request to write data to a boot logical unit of the memory device;
update a parameter from a first value to a second value based at least in part on receiving the request to write the data to the boot logical unit of the memory device, the second value of the parameter indicating a first stage of a procedure for updating the boot logical unit;
write, to a block of memory in the memory device, the data based at least in part on the parameter indicating the first stage of the procedure for updating the boot logical unit; and
update the parameter from the second value to a third value based at least in part on writing the data to the block of memory in the memory device, the third value of the parameter indicating a second stage of the procedure for updating the boot logical unit, wherein the third value is different than the first value.