US 12,474,867 B2
Methods, apparatus, and articles of manufacture to interleave data accesses for improved throughput
Vignesh Raghavendra, Bengaluru (IN); Sriramakrishnan Govindarajan, Bengaluru (IN); Mihir Narendra Mody, Bengaluru (IN); Sai Karthik Rajaraman, Frisco, TX (US); Shailesh Ganapat Ghotgalkar, Bengaluru (IN); and Mohammad Asif Farooqui, Bengaluru (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Sep. 21, 2023, as Appl. No. 18/371,338.
Prior Publication US 2025/0103244 A1, Mar. 27, 2025
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a read queue to store a first read request to access a first storage;
sequencing circuitry coupled to the read queue, the sequencing circuitry to sequence a portion of a second request to access a second storage to be interleaved with a wait interval of the first read request, the second request queued after the first read request; and
prioritization circuitry coupled to the sequencing circuitry and coupled to the first storage and the second storage via a shared bus, the prioritization circuitry to:
generate a first transaction to access the first storage over the shared bus and a second transaction to access the second storage over the shared bus concurrently with the first transaction, the first transaction based on the first read request, the second transaction based on the second request; and
cause transmission of a first select signal to the first storage and a second select signal to the second storage, the first select signal to remain asserted during the first transaction including the portion of the first transaction that is interleaved with the second transaction, and the second select signal to remain asserted during the second transaction.