US 12,474,866 B2
Interconnect circuitry for multi-channel and multi-requester memory systems
Ygal Arbel, Morgan Hill, CA (US); and Krishnan Srinivasan, San Jose, CA (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Aug. 31, 2023, as Appl. No. 18/241,142.
Prior Publication US 2025/0077116 A1, Mar. 6, 2025
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An interconnect circuitry of an integrated circuit (IC) device, the interconnect circuitry comprising:
interleaving switch circuitries coupled to requester devices of the IC device, a first interleaving switch circuitry of the interleaving switch circuitries comprises first ports and is configured to:
receive a first memory command; and
output the first memory command via first communication lanes disposed within the IC device and connected to a first port of the first ports based on a memory address of the first memory command;
network switch circuitries connected to the interleaving switch circuitries, a first network switch circuitry of the network switch circuitries connected to a first communication lane and second communication lane of the first communication lanes and configured to route the first memory command from the first communication lane to the second communication lane based on the memory address, wherein the first communication lane is disposed in a first direction and the second communication lane is disposed in a second direction different than the first direction; and
crossbar circuitries coupled to memory devices external to the IC device, a first crossbar circuitry of the crossbar circuitries configured to receive the first memory command from the first communication lanes and output the first memory command to a first memory device of the memory devices associated with the memory address, wherein a number of the first ports corresponds to an interleaving order of the memory devices, and wherein the second communication lane is connected to two or more of the crossbar circuitries.