US 12,474,759 B2
Platform voltage regulator circuitry configurations
Sameer Shekhar, Portland, OR (US); Amit K. Jain, Portland, OR (US); and Chin Lee Kuan, Bayan Lepas (MY)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 1, 2022, as Appl. No. 17/683,435.
Prior Publication US 2023/0280814 A1, Sep. 7, 2023
Int. Cl. G06F 1/3234 (2019.01); G05F 1/575 (2006.01); H02M 3/07 (2006.01)
CPC G06F 1/3234 (2013.01) [G05F 1/575 (2013.01); H02M 3/07 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A device comprising:
a first voltage regulator configured to provide a first VR output;
a second voltage regulator configured to provide a second VR output independent of the first VR output;
a first capacitor electrically coupled between the first VR output and a ground;
a second capacitor electrically coupled between the second VR output and the ground;
a first switch electrically coupled between the first VR output and the second VR output;
a second switch situated in parallel with the first switch, the second switch electrically coupled between the first VR output and the second VR output; and
a controller configured to provide control signals that control the first voltage regulator, the second voltage regulator, the first switch, and the second switch, wherein the first switch and the second switch are situated, when activated, to reduce parasitic output resistance and parasitic output inductance of the first voltage regulator to a load.