US 12,473,648 B2
Substrate processing apparatus, substrate processing method, method of manufacturing semiconductor device and non-transitory computer-readable recording medium
Hirohisa Yamazaki, Toyama (JP)
Assigned to Kokusai Electric Corporation, Tokyo (JP)
Filed by Kokusai Electric Corporation, Tokyo (JP)
Filed on Nov. 18, 2022, as Appl. No. 17/990,236.
Application 17/990,236 is a continuation of application No. 17/476,132, filed on Sep. 15, 2021, granted, now 11,542,603.
Claims priority of application No. 2020-158290 (JP), filed on Sep. 23, 2020.
Prior Publication US 2023/0081219 A1, Mar. 16, 2023
Int. Cl. C23C 16/458 (2006.01); C23C 16/30 (2006.01); C23C 16/34 (2006.01); C23C 16/40 (2006.01); C23C 16/46 (2006.01); H01J 37/32 (2006.01)
CPC C23C 16/4583 (2013.01) [C23C 16/308 (2013.01); C23C 16/34 (2013.01); C23C 16/345 (2013.01); C23C 16/401 (2013.01); C23C 16/403 (2013.01); C23C 16/46 (2013.01); H01J 37/3244 (2013.01); H01J 2237/006 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A substrate processing apparatus comprising:
a reaction vessel configured to be capable of accommodating a substrate retainer provided with a substrate support region in which a substrate is supported and a heat insulator provided below the substrate support region;
an auxiliary chamber provided in the reaction vessel and extending along an extending direction from at least a position below an upper end of the heat insulator to a position facing the substrate support region; and
a first inner plate provided in the auxiliary chamber along a plane perpendicular to the extending direction of the auxiliary chamber so as to divide an inner space of the auxiliary chamber,
wherein a first gap is provided between an outer periphery of the heat insulator and an edge of the first inner plate,
a second gap is provided between the outer periphery of the heat insulator and at least a portion of an inner wall of the reaction vessel on which the auxiliary chamber is not provided, and
the first gap and the second gap are substantially equal.