US 12,144,212 B2
Display substrate with display region including opening and manufacturing method thereof, and display device
Xiaoqing Shu, Beijing (CN); Mengmeng Du, Beijing (CN); Xiangdan Dong, Beijing (CN); and Rong Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/279,861
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed May 13, 2020, PCT No. PCT/CN2020/090031
§ 371(c)(1), (2) Date Mar. 25, 2021,
PCT Pub. No. WO2021/226879, PCT Pub. Date Nov. 18, 2021.
Prior Publication US 2022/0115487 A1, Apr. 14, 2022
Int. Cl. H10K 59/131 (2023.01); G09G 3/3208 (2016.01); H10K 59/121 (2023.01); G09G 3/3233 (2016.01); H10K 59/12 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3208 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); G09G 3/3233 (2013.01); G09G 2300/0426 (2013.01); H10K 59/1201 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display substrate, comprising a display region, a peripheral region surrounding the display region, and an opening,
wherein the opening is on a side of the peripheral region away from the display region, and the peripheral region comprises an opening peripheral region at least partially surrounding the opening;
the display substrate comprises a base substrate, a semiconductor pattern, a first conductive pattern, and a second conductive pattern, the semiconductor pattern, the first conductive pattern, and the second conductive pattern being in the opening peripheral region;
the semiconductor pattern is on the base substrate, the first conductive pattern is on a side of the semiconductor pattern away from the base substrate, and the second conductive pattern is on a side of the first conductive pattern away from the semiconductor pattern;
the first conductive pattern is configured to transmit an electrical signal for the display region;
the first conductive pattern comprises a plurality of first wire groups arranged side by side in a first direction, and each of the first wire groups comprises at least two first wires arranged side by side in the first direction;
in a direction perpendicular to the base substrate, each of the at least two first wires is spaced and insulated from the semiconductor pattern and the second conductive pattern, respectively, so as to be able to form a capacitor;
the semiconductor pattern is electrically connected to the second conductive pattern through a plurality of via holes in the opening peripheral region, and the plurality of via holes are between adjacent first wire groups in the first direction; and
the display substrate further comprises a pixel driving circuit, and an orthographic projection of the pixel driving circuit on the base substrate does not overlap with the opening peripheral region.