CPC H04W 56/001 (2013.01) [H04W 76/10 (2018.02); H04W 76/30 (2018.02)] | 9 Claims |
1. A baseband processor configured to perform operations comprising:
receiving an indication to release a radio resource control (RRC) connection and to operate in RRC inactive mode, wherein the indication to release the RRC connection configures resources for performing uplink transmissions while in the RRC inactive mode and includes timing configuration information, the timing configuration information comprising a time alignment timer (TAT) value, for use while operating in the RRC inactive mode;
initiating a TAT when releasing the RRC connection using the TAT value provided in the timing configuration information;
maintaining a timing advance while in the RRC inactive mode; and
interfacing with radio frequency (RF) circuitry to perform an uplink transmission using resources configured for performing uplink transmissions while in the RRC inactive mode, wherein the uplink transmission is performed using the timing advance.
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