CPC H04N 19/12 (2014.11) [H04N 19/126 (2014.11); H04N 19/159 (2014.11); H04N 19/176 (2014.11)] | 2 Claims |
1. An encoder, comprising:
circuitry; and
memory, wherein
using the memory, the circuitry:
applies a first transform to a residual signal of a current block; and
applies a second transform to a result of the first transform, the second transform being a non-separable transform, wherein
(i) when a size of the current block is a first block size, the second transform is applied to a first sub-block having a first sub-block size in the current block using a transform scheme of the second transform is selected from a first group of candidates,
(ii) when the size of the current block is a second block size different from the first block size, the second transform is applied to a second sub-block having the first sub-block size in the current block using the transform scheme of the second transform is selected from a second group of candidates,
the first group of candidates includes a first transform scheme which generates a first number of transform coefficients using a first transform matrix, and
the second group of candidates includes a second transform scheme which generates a second number of transform coefficients using the first transform matrix, the first number is smaller than the second number.
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