| CPC H04L 9/50 (2022.05) [G06F 12/0246 (2013.01); G06F 12/0891 (2013.01); G06F 12/1408 (2013.01); G06F 12/1433 (2013.01); H04L 9/3247 (2013.01); H04L 63/12 (2013.01)] | 19 Claims |

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1. An apparatus, comprising:
a memory, wherein the memory comprises an array of memory cells; and
circuitry configured to:
define an address of the array and a size of the array; and
use the memory as a block in a block chain data structure for validating data stored in the memory.
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