US 12,143,127 B2
Pulse width modulation generated by a sigma delta loop
Dirk Hammerschmidt, Finkenstein (AT)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Feb. 9, 2023, as Appl. No. 18/166,644.
Application 18/166,644 is a continuation of application No. 17/003,147, filed on Aug. 26, 2020, granted, now 11,581,902.
Prior Publication US 2023/0179223 A1, Jun. 8, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H03K 3/00 (2006.01); H02P 27/08 (2006.01); H03K 3/017 (2006.01); H03K 5/08 (2006.01); H03K 7/08 (2006.01); H03M 3/00 (2006.01)
CPC H03M 3/436 (2013.01) [H02P 27/08 (2013.01); H03K 3/017 (2013.01); H03K 5/086 (2013.01); H03K 7/08 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A sigma delta (SD) pulse-width modulation (PWM) loop, comprising:
a loop filter implementing a linear transfer function to generate a loop filter signal, wherein the loop filter is configured to receive an input signal and a first feedback signal and generate the loop filter signal based on the input signal, the first feedback signal, and the linear transfer function; and
a hysteresis comparator coupled to an output of the loop filter, the hysteresis comparator configured to receive the loop filter signal and generate a sigma delta PWM signal based on the loop filter signal,
wherein the first feedback signal is derived from the sigma delta PWM signal,
wherein the loop filter comprises a combiner circuit configured to receive the input signal and the sigma delta PWM signal, and generate a combined signal having a combined value that corresponds to a subtraction of the sigma delta PWM signal from the input signal, and
wherein the hysteresis comparator is configured to receive the loop filter signal and generate the sigma delta PWM signal based on comparing the loop filter signal to a first hysteresis threshold and to a second hysteresis threshold, wherein the first hysteresis threshold is greater than a maximum amplitude of the input signal.