US 12,143,080 B2
Offset correction circuit
Tomokazu Kojima, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 17/289,109
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Nov. 19, 2018, PCT No. PCT/JP2018/042654
§ 371(c)(1), (2) Date Apr. 27, 2021,
PCT Pub. No. WO2020/105086, PCT Pub. Date May 28, 2020.
Prior Publication US 2022/0123701 A1, Apr. 21, 2022
Int. Cl. H03F 1/02 (2006.01); H03F 3/345 (2006.01); H03F 3/45 (2006.01); H03F 3/72 (2006.01)
CPC H03F 3/45771 (2013.01) [H03F 3/345 (2013.01); H03F 3/45183 (2013.01); H03F 3/72 (2013.01); H03F 3/45475 (2013.01); H03F 2203/45212 (2013.01); H03F 2203/45286 (2013.01); H03F 2203/45396 (2013.01)] 12 Claims
OG exemplary drawing
 
1. An offset correction circuit comprising:
a first correction voltage generation circuit to provide a first correction voltage for correcting an input voltage, the first correction voltage being positive or negative;
a second correction voltage generation circuit to provide, in accordance with the first correction voltage, a second correction voltage identical in polarity to the first correction voltage, the second correction voltage having a second temperature coefficient reverse in polarity to a first temperature coefficient of the first correction voltage; and
an output stage to generate an output voltage in accordance with a voltage obtained by adding the input voltage and a sum of the first correction voltage and the second correction voltage, wherein
the first correction voltage generation circuit includes:
a first field effect transistor including a gate to receive input of the input voltage,
a second field effect transistor including a gate connected to a node where a first voltage resulting from addition of the first correction voltage to the input voltage is provided
a first current source group for passage of a comparable current through the first field effect transistor and the second field effect transistor, and
a transistor size ratio control mechanism to variably control a ratio of a transistor size of the second field effect transistor to a transistor size of the first field effect transistor.