US 12,143,075 B2
Circuit for downlink/uplink operational mode switching in a TDD wireless communication system
Davide Durante, Castel San Pietro Terme (IT); and Massimo Notargiacomo, Castel San Pietro Terme (IT)
Assigned to TEKO TELECOM S.r.l., Castel San Pietro Terme (IT)
Appl. No. 17/620,859
Filed by TEKO TELECOM S.r.l., Castel San Pietro Terme (IT)
PCT Filed Jul. 9, 2020, PCT No. PCT/IB2020/056472
§ 371(c)(1), (2) Date Dec. 20, 2021,
PCT Pub. No. WO2021/005555, PCT Pub. Date Jan. 14, 2021.
Claims priority of application No. 102019000011475 (IT), filed on Jul. 11, 2019.
Prior Publication US 2022/0345094 A1, Oct. 27, 2022
Int. Cl. H03F 3/19 (2006.01); H03F 1/30 (2006.01); H03F 3/193 (2006.01); H03F 3/24 (2006.01); H03F 3/72 (2006.01); H04B 1/48 (2006.01)
CPC H03F 3/193 (2013.01) [H03F 1/301 (2013.01); H03F 3/245 (2013.01); H03F 3/72 (2013.01); H04B 1/48 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01); H03F 2203/7206 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A circuit (C) for downlink/uplink operational mode switching in a TDD wireless communication system, comprising at least a field-effect transistor (RF FET) operatively connected to a power amplifier (PA) on the downlink path (DL) of a RF front-end apparatus in the TDD wireless communication system, the circuit comprising:
a first voltage generator (VgsOFF) connected to at least a large-value first resistor (Rhold);
a second voltage generator (VGate) connected to a second resistor (RGate);
at least a large-value hold capacitor (Chold);
a sample-and-hold circuit configured to be switched between a reception (Rx) configuration, wherein
said first voltage generator (VgsOFF) is connected to the gate (G) of said field-effect transistor (RF FET) and said large-value capacitor (Chold) is connected to said first voltage generator (VgsOFF) through said first resistor (Rhold), and a transmission (Tx) configuration, and
the gate (G) of said field-effect transistor (RF FET) is connected to said hold capacitor (Chold) and said hold capacitor (Chold) is connected to said second voltage generator (VGate) through said second resistor (RGate).