US 12,143,070 B2
Parallel input and dynamic cascaded operational transconductance amplifier achieving high precision with phase shifting
Min-Hung Hu, New Taipei (TW)
Assigned to RICHTEK TECHNOLOGY CORPORATION, Zhubei (TW)
Filed by Richtek Technology Corporation, Zhubei (TW)
Filed on Dec. 15, 2021, as Appl. No. 17/552,310.
Claims priority of application No. 109144431 (TW), filed on Dec. 16, 2020.
Prior Publication US 2022/0190788 A1, Jun. 16, 2022
Int. Cl. H03F 1/42 (2006.01); H02M 3/155 (2006.01); H03F 3/45 (2006.01)
CPC H03F 1/42 (2013.01) [H02M 3/155 (2013.01); H03F 3/45076 (2013.01); H03F 2200/36 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A parallel input and dynamic cascaded operational transconductance amplifier (OTA), comprising: a plurality of sub-OTAs, wherein each sub-OTA is configured to operably generate a corresponding transconductance output current according to a differential input voltage which is linearly coupled to the plurality of sub-OTAs, wherein the plurality of sub-OTAs include a first sub-OTA and a second sub-OTA; and at least one cascading capacitor, which is cascaded between the first sub-OTA and the second sub-OTA, wherein the at least one cascading capacitor includes a first cascading capacitor, which is cascaded between the first sub-OTA and the second sub-OTA; wherein a second transconductance output current generated by the second sub-OTA is coupled through the first cascading capacitor to generate an AC coupled (coupled in an alternating current manner) transient bias current on a common mode bias node of the first sub-OTA, thus providing the AC coupled transient bias current to both a non-inverting transconductance current and an inverting transconductance current of a differential pair circuit of the first sub-OTA in a case when a transient state occurs in the differential input voltage corresponding to the first sub-OTA, wherein the non-inverting transconductance current and the inverting transconductance current of the differential pair circuit during the transient state have a phase difference which is sufficiently large that an transconductance output current of the differential pair circuit is enhanced to an extent, so that a loop bandwidth and a response speed during the transient state are enhanced, and during a steady state, the AC coupled transient bias current is reduced, so as to enhance stability through reducing the loop bandwidth.