US 12,143,003 B2
Method for extending the hold-up time
Manuel Escudero Rodriguez, Villach (AT); Jon Azurza Anderson, Villach (AT); Matthias J. Kasper, Villach (AT); and David Meneses Herrera, Villach (AT)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on May 17, 2022, as Appl. No. 17/746,441.
Claims priority of application No. 21180666 (EP), filed on Jun. 21, 2021.
Prior Publication US 2022/0407405 A1, Dec. 22, 2022
Int. Cl. H02M 1/00 (2007.01); H02M 1/42 (2007.01); H02M 3/158 (2006.01)
CPC H02M 1/0096 (2021.05) [H02M 1/0085 (2021.05); H02M 1/4208 (2013.01); H02M 3/1588 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
switching between operating a buffer circuit in a first operating mode and a second operating mode;
wherein operating the buffer circuit in the first operating mode includes buffering power in a parallel capacitor circuit of the buffer circuit, the parallel capacitor circuit comprising a first capacitor and a second capacitor, the power provided by a power source, both the first capacitor and the second capacitor being charged by the power source in the first operating mode; and
wherein operating the buffer circuit in the second operating mode includes: i) supplying power to a load via a first voltage across the second capacitor; and ii) regulating the first voltage across the second capacitor, the first voltage regulated via controlled transfer of charge from the first capacitor to the second capacitor.