| CPC H01L 29/7824 (2013.01) [H01L 29/086 (2013.01); H01L 29/0878 (2013.01); H01L 29/66681 (2013.01)] | 13 Claims |
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1. A semiconductor device, comprising:
a semiconductor substrate;
a first insulating film formed on a first region of the semiconductor substrate;
a second insulating film formed on a second region of the semiconductor substrate;
a gate electrode formed on the first insulating film;
a field plate portion formed on the second insulating film;
a source region of a first conductivity type, the source region being formed in the semiconductor substrate; and
a drain region of the first conductivity type, the drain region being formed in the semiconductor substrate,
wherein the field plate portion includes:
a first semiconductor region of a second conductivity type different from the first conductivity type; and
a second semiconductor region of the first conductivity type,
wherein the first semiconductor region is electrically connected to the source region,
wherein the second semiconductor region is electrically connected to the drain region,
wherein the first semiconductor region includes:
a first high concentration semiconductor region; and
a first low concentration semiconductor region having a lower impurity concentration than the first high concentration semiconductor region,
wherein, in plan view, the first low concentration semiconductor region is arranged so as to be sandwiched between the first high concentration semiconductor region and the second semiconductor region,
wherein the first high concentration semiconductor region is electrically connected to the source region,
wherein the first low concentration semiconductor region is in contact with the second insulating film, and
wherein a part of the first low concentration semiconductor region is interposed between a bottom of the first high concentration semiconductor region and the second insulating film.
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