US 12,142,637 B2
Semiconductor device and method of manufacturing the same
Cheng-Yu Lin, Hsinchu (TW); Yi-Lin Fan, Hsinchu (TW); Hui-Zhong Zhuang, Hsinchu (TW); Sheng-Hsiung Chen, Hsinchu (TW); Jerry Chang Jui Kao, Hsinchu (TW); and Xiangdong Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinhu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jan. 13, 2022, as Appl. No. 17/575,590.
Claims priority of provisional application 63/221,699, filed on Jul. 14, 2021.
Claims priority of provisional application 63/216,329, filed on Jun. 29, 2021.
Prior Publication US 2022/0416026 A1, Dec. 29, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 23/522 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01)
CPC H01L 29/0696 (2013.01) [H01L 23/5226 (2013.01); H01L 29/401 (2013.01); H01L 29/4238 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A cell region of a semiconductor device, the cell region comprising:
a first isolation dummy gate extending along a first direction;
a second isolation dummy gate extending along the first direction;
a first gate extending along the first direction and being between the first isolation dummy gate and the second isolation dummy gate;
a second gate extending along the first direction, the second gate being between the first isolation dummy gate and the second isolation dummy gate relative to a second direction perpendicular to the first direction;
a first active region extending in the second direction between the first isolation dummy gate and the second isolation dummy gate; and
a second active region,
wherein:
the first isolation dummy gate is in a trench that extends through the first active region and the second active region;
the second isolation dummy gate is in a trench that extends through the first active region and the second active region;
the first active region has a first length in the second direction; and
the second active region has a second length in the second direction different from the first length.