US 12,142,617 B2
Electronic device
Takeshi Aoki, Kanagawa (JP); Yoshiyuki Kurokawa, Kanagawa (JP); Takayuki Ikeda, Kanagawa (JP); and Hikaru Tamura, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Aug. 10, 2023, as Appl. No. 18/232,424.
Application 14/990,934 is a division of application No. 13/224,655, filed on Sep. 2, 2011, granted, now 9,252,171, issued on Feb. 2, 2016.
Application 18/232,424 is a continuation of application No. 17/893,247, filed on Aug. 23, 2022, granted, now 11,728,354.
Application 17/893,247 is a continuation of application No. 17/223,248, filed on Apr. 6, 2021, granted, now 11,430,820, issued on Aug. 30, 2022.
Application 17/223,248 is a continuation of application No. 16/902,124, filed on Jun. 15, 2020, granted, now 11,239,268, issued on Feb. 1, 2022.
Application 16/902,124 is a continuation of application No. 16/161,209, filed on Oct. 16, 2018, granted, now 10,685,992, issued on Jun. 16, 2020.
Application 16/161,209 is a continuation of application No. 14/990,934, filed on Jan. 8, 2016, granted, now 10,109,661, issued on Oct. 23, 2018.
Claims priority of application No. 2010-198928 (JP), filed on Sep. 6, 2010.
Prior Publication US 2024/0006424 A1, Jan. 4, 2024
Int. Cl. H01L 27/146 (2006.01); G09G 3/36 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/14603 (2013.01) [G09G 3/3648 (2013.01); H01L 27/14612 (2013.01); H01L 27/14616 (2013.01); H01L 27/14625 (2013.01); H01L 27/14636 (2013.01); H01L 27/14641 (2013.01); H01L 27/14643 (2013.01); H01L 29/7869 (2013.01); G09G 2354/00 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An electronic device comprising a pixel, the pixel comprising:
a photodiode;
a first wire electrically connected to an anode of the photodiode;
a second wire electrically connected to the first wire;
a first transistor;
a second transistor; and
a third transistor,
wherein a gate of the first transistor is electrically connected to a third wire,
wherein one of a source and a drain of the first transistor is electrically connected to a cathode of the photodiode,
wherein the other of the source and the drain of the first transistor is electrically connected to a fourth wire,
wherein a gate of the second transistor is electrically connected to the fourth wire,
wherein one of a source and a drain of the second transistor is electrically connected to a fifth wire,
wherein a gate of the third transistor is electrically connected to a sixth wire,
wherein one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the second transistor,
wherein the other of the source and the drain of the third transistor is electrically connected to a seventh wire, and
wherein the first wire and the second wire are positioned in different layers.