US 12,142,571 B2
Semiconductor device package and method of manufacturing the same
Chao Wei Liu, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Dec. 13, 2022, as Appl. No. 18/080,640.
Application 18/080,640 is a continuation of application No. 16/864,092, filed on Apr. 30, 2020, granted, now 11,527,480.
Prior Publication US 2023/0114278 A1, Apr. 13, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/5385 (2013.01) [H01L 21/4853 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3128 (2013.01); H01L 23/5386 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A semiconductor device package, comprising:
a first substrate having a first upper surface;
a first electronic component disposed over the first upper surface of the first substrate;
a second substrate disposed over the first electronic component and having a second upper surface;
a second electronic component disposed over the second upper surface of the second substrate; and
a plurality of interconnections, wherein all of the plurality of interconnections connect the second upper surface of the second substrate and the first upper surface of the first substrate;
wherein the second substrate has a first lateral surface and a recess is recessed from the first lateral surface;
wherein the second substrate has a second lateral surface and the recess is recessed from the second lateral surface of the second substrate;
wherein the second substrate has a third lateral surface substantially aligned with a lateral surface of the first substrate.