US 12,142,542 B2
Semiconductor device having a thermal contact and method of making
Jian Wu, Hsinchu (TW); Feng Han, Hsinchu (TW); and Shuai Zhang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); and TSMC CHINA COMPANY, LIMITED, Shanghai (CN)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); and TSMC CHINA COMPANY, LIMITED, Shanghai (CN)
Filed on Aug. 10, 2023, as Appl. No. 18/447,927.
Application 18/447,927 is a division of application No. 17/818,782, filed on Aug. 10, 2022.
Application 17/818,782 is a division of application No. 17/122,749, filed on Dec. 15, 2020, granted, now 11,862,527.
Claims priority of application No. 202011306929.9 (CN), filed on Nov. 20, 2020.
Prior Publication US 2023/0386958 A1, Nov. 30, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/36 (2006.01); H01L 23/367 (2006.01); H01L 27/12 (2006.01)
CPC H01L 23/36 (2013.01) [H01L 21/4871 (2013.01); H01L 21/4875 (2013.01); H01L 23/3677 (2013.01); H01L 27/1203 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a substrate;
a semiconductor material layer over the substrate;
a first source structure in the semiconductor material layer, wherein the first source structure comprises a first doped well having a first dopant type;
a drain structure in the semiconductor material layer, wherein the drain structure comprises a second doped well having the first dopant type;
a second source structure in the semiconductor material layer, wherein the second source structure comprises a third doped well having the first dopant type, wherein the drain structure is between the first source structure and the second source structure;
a first deep trench isolation (DTI) extending through the first doped well; and
a first thermal contact extending through the first DTI, wherein the thermal contact is in direct contact with the substrate; and the first DTI is between the thermal contact and the first doped well.