US 12,142,490 B2
Performing annealing process to improve Fin quality of a FinFET semiconductor
Tzung-Yi Tsai, Taoyuan (TW); Yen-Ming Chen, Chu-Pei (TW); Tsung-Lin Lee, Hsinchu (TW); and Po-Kang Ho, Taoyuan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Apr. 11, 2022, as Appl. No. 17/717,375.
Application 17/717,375 is a division of application No. 16/158,802, filed on Oct. 12, 2018, granted, now 11,302,535.
Claims priority of provisional application 62/690,614, filed on Jun. 27, 2018.
Prior Publication US 2022/0238350 A1, Jul. 28, 2022
Int. Cl. H01L 21/32 (2006.01); H01L 21/324 (2006.01); H01L 21/768 (2006.01); H01L 29/161 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/324 (2013.01) [H01L 21/76832 (2013.01); H01L 29/161 (2013.01); H01L 29/517 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate that contains a semiconductive material;
a fin structure that protrudes out of the substrate, wherein the fin structure is a fin structure for a p-type FinFET transistor;
a silicon cap layer disposed on the fin structure, wherein the silicon cap layer is a single continuous structure, wherein a first segment of the silicon cap layer is disposed directly on an upper surface of the fin structure, wherein a second segment of the silicon cap layer is disposed directly on a side surface of the fin structure, and wherein the first segment and the second segment have a same material composition; and
a gate dielectric layer disposed over the silicon cap layer;
wherein:
the fin structure has a line width roughness (LWR) between about 1.7 nanometers (nm) and about 1.9 nm; or
the fin structure has a line edge roughness (LER) between about 1.5 nanometers (nm) and about 1.7 nm;
the fin structure has an average width Finwidth-average;
a ratio of LWR:Fin_width_average is in a range between about 1:4 and about 1:5; and
a ratio of LER:Fin_width_average is in a range between about 1:4 and about 1:5.