US 12,142,480 B2
Seam removal in high aspect ratio gap-fill
Qinghua Zhao, Sunnyvale, CA (US); Rui Cheng, San Jose, CA (US); Ruiyun Huang, Santa Clara, CA (US); Dong Hyung Lee, Danville, CA (US); Aykut Aydin, Sunnyvale, CA (US); and Karthik Janakiraman, San Jose, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Aug. 13, 2021, as Appl. No. 17/401,574.
Prior Publication US 2023/0050255 A1, Feb. 16, 2023
Int. Cl. H01L 21/02 (2006.01); H01L 21/3205 (2006.01)
CPC H01L 21/0234 (2013.01) [H01L 21/02167 (2013.01); H01L 21/0217 (2013.01); H01L 21/32055 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A semiconductor processing method comprising:
providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region of the semiconductor processing chamber, and wherein the substrate defines one or more recessed features along the substrate;
depositing a silicon-containing material on the substrate, wherein the silicon-containing material extends within the one or more recessed features along the substrate, and wherein a seam or void is defined by the silicon-containing material within at least one of the one or more recessed features along the substrate;
forming a plasma of a hydrogen-containing gas within the processing region of the semiconductor processing chamber; and
treating the silicon-containing material with plasma effluents of the hydrogen-containing gas, wherein the plasma effluents cause a size of the seam or void to be reduced.