CPC G11C 29/42 (2013.01) [G11C 15/04 (2013.01); G11C 29/1201 (2013.01); G11C 29/20 (2013.01); G11C 2029/1202 (2013.01); G11C 2029/1208 (2013.01)] | 20 Claims |
1. A memory device comprising:
a content addressable memory (CAM) block storing a plurality of stored search keys; and
control logic, operatively coupled with the CAM block, to perform operations comprising:
reading one of the plurality of stored search keys from at least one string of the CAM block to determine a first number of memory cells in the at least one string storing a first logical value;
determining a calculated parity value representing the first number of memory cells in the at least one string storing the first logical value;
storing the calculated parity value in a page cache associated with the CAM block;
reading stored parity data from one or more memory cells in the at least one string in the CAM block, the one or more memory cells connected to one or more additional wordlines in the CAM block; and
comparing the calculated parity value to the stored parity data to determine whether an error is present in the one of the plurality of stored search keys in the CAM block.
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