US 12,142,330 B2
Semiconductor memory device and method of operating the semiconductor memory device
Hee Youl Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 3, 2021, as Appl. No. 17/518,316.
Claims priority of application No. 10-2021-0067942 (KR), filed on May 26, 2021.
Prior Publication US 2022/0383968 A1, Dec. 1, 2022
Int. Cl. G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/3459 (2013.01) [G11C 11/5628 (2013.01); G11C 11/5671 (2013.01); G11C 16/10 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method of operating a semiconductor memory device including a plurality of program loops for programming selected memory cells among a plurality of memory cells to a first program state higher than an erase state and a second program state higher than the first program state, wherein each of the plurality of program loops comprises:
applying a program voltage to a word line connected to the selected memory cells;
performing a verify operation on the selected memory cells to be programmed to the first program state among a plurality of program states using a first pre-verify voltage, a second pre-verify voltage greater than the first pre-verify voltage, and a main verify voltage greater than the second pre-verify voltage;
applying, based on a result of the verify operation, a first program permission voltage, a second program permission voltage greater than the first program permission voltage, a third program permission voltage greater than the second program permission voltage, or a program prohibition voltage greater than the third program permission voltage to bit lines connected to first memory cells among the selected memory cells; and
applying the first program permission voltage to bit lines connected to second memory cells to be programmed to the second program state among the selected memory cells when the first memory cells are programed.