US 12,142,210 B2
Display panel and display apparatus
Yu Wang, Beijing (CN); Yao Huang, Beijing (CN); Binyan Wang, Beijing (CN); Cong Liu, Beijing (CN); and Benlian Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/789,566
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Sep. 30, 2021, PCT No. PCT/CN2021/122084
§ 371(c)(1), (2) Date Jun. 28, 2022,
PCT Pub. No. WO2023/050269, PCT Pub. Date Apr. 6, 2023.
Prior Publication US 2024/0212599 A1, Jun. 27, 2024
Int. Cl. G09G 3/3233 (2016.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01)
CPC G09G 3/3233 (2013.01) [H10K 59/1213 (2023.02); H10K 59/1315 (2023.02); G09G 2300/0426 (2013.01); G09G 2320/0233 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising a base substrate, a driving circuit layer on the base substrate and a light emitting structure layer on a side of the driving circuit layer away from the base substrate, wherein the driving circuit layer comprises a plurality of circuit units, and the light emitting structure layer comprises a plurality of light emitting devices; at least one of the plurality of circuit units comprises a plurality of initial signal lines and a pixel driving circuit; the pixel driving circuit comprises a plurality of transistors, which comprise at least one oxide thin film transistor and at least one low-temperature polycrystalline silicon thin film transistor;
the plurality of initial signal lines each comprise a signal sub-line in a first direction, at least one of the plurality of initial signal lines comprises a signal sub-line extending in a second direction; the first direction and the second direction intersect with each other; the signal sub-line extending in the first direction of the initial signal line and the signal sub-line extending in the second direction of the initial signal line are electrically connected to each other;
the driving circuit layer comprises a first semiconductor layer, a first conductive layer, a second semiconductor layer, a third conductive layer, a fourth conductive layer and a fifth conductive layer which are sequentially arranged in a direction away from the base substrate;
the first semiconductor layer comprises an active layer of the low-temperature polycrystalline silicon thin film transistor;
the first conductive layer comprises a gate electrode of the low-temperature polycrystalline silicon thin film transistor;
the second conductive layer comprises a first gate electrode of the oxide thin film transistor and at least one signal sub-line extending in the first direction;
the second semiconductor layer comprises an active layer of the oxide thin film transistor;
the third conductive layer comprises a second gate electrode of the oxide thin film transistor;
the fourth conductive layer comprises at least one signal sub-line extending in the first direction; and
the fifth conductive layer comprises the signal sub-line extending in the second direction.