US 12,141,544 B2
Bitonic sorting accelerator
Indu Prathapan, Bangalore (IN); Puneet Sabbarwal, Bangalore (IN); and Pankaj Gupta, Bangalore (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Jun. 15, 2023, as Appl. No. 18/335,452.
Application 18/335,452 is a continuation of application No. 17/156,731, filed on Jan. 25, 2021, granted, now 11,714,603.
Application 17/156,731 is a continuation of application No. 16/237,447, filed on Dec. 31, 2018, granted, now 10,901,692, issued on Jan. 26, 2021.
Claims priority of application No. 201841026064 (IN), filed on Jul. 12, 2018.
Prior Publication US 2023/0418555 A1, Dec. 28, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 7/24 (2006.01); G06F 5/06 (2006.01)
CPC G06F 7/24 (2013.01) [G06F 5/065 (2013.01); G06F 2207/228 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
a first input;
a second input;
a third input;
a fourth input;
a first compare-exchange circuit comprising:
a fifth input coupled to the first input;
a sixth input coupled to the second input;
a first output; and
a second output;
a second compare-exchange circuit comprising:
a seventh input coupled to the third input;
an eighth input coupled to the fourth input;
a third output; and
a fourth output;
a third compare-exchange circuit comprising:
a ninth input coupled to the first output;
a tenth input coupled to the third output;
a fifth output coupled to a sixth output of the circuit; and
a seventh output coupled to an eighth output of the circuit; and
a fourth compare-exchange circuit comprising:
an eleventh input coupled to the second output;
a twelfth input coupled to the fourth output;
a ninth output coupled to a tenth output of the circuit; and
an eleventh output coupled to a twelfth output of the circuit.