US 12,141,467 B2
Cross-temperature mitigation in a memory system
Murong Lang, San Jose, CA (US); Christina Papagianni, San Jose, CA (US); Zhenming Zhou, San Jose, CA (US); and Ting Luo, Santa Clara, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 19, 2022, as Appl. No. 17/868,085.
Prior Publication US 2024/0028248 A1, Jan. 25, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/064 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method, comprising:
determining a first temperature of a memory system that comprises a first block configured with a first rate for performing scan operations and a second block configured with a second rate for performing scan operations;
selecting, for writing a set of data and based at least in part on the first temperature falling outside of a first threshold range, the first block based at least in part on the first block being configured with the first rate for performing scan operations to determine error information for the first block;
determining a second temperature of the memory system after writing the set of data to the first block;
determining to transfer the set of data from the first block based at least in part on the second temperature and the first rate for performing scan operations; and
selecting, for transferring the set of data from the first block and based at least in part on the second temperature falling within a second threshold range, the second block based at least in part on the second block being configured with the second rate, for performing scan operations to determine error information for the second block, that is slower than the first rate.