US 12,141,437 B2
Program command generation with dummy data generation at a memory device
Jeremy Binfet, Boise, ID (US); Violante Moschiano, Avezzano (IT); James Fitzpatrick, Laguna Niguel, CA (US); Kishore Kumar Muccherla, San Jose, CA (US); Jeffrey S. McNeil, Nampa, ID (US); and Phong Sy Nguyen, Livermore, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 27, 2022, as Appl. No. 17/974,799.
Claims priority of provisional application 63/274,773, filed on Nov. 2, 2021.
Prior Publication US 2023/0137866 A1, May 4, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/061 (2013.01) [G06F 3/064 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
an array of memory cells organized into a plurality of sub-blocks and a plurality of wordlines; and
control logic operatively coupled with the array of memory cells, the control logic to perform operations comprising:
receiving a program command from a processing device of a memory sub-system, the program command comprising a bit indicating that a physical address of the program command is associated with a retired wordline of the plurality of wordlines;
in response to detecting the bit within the program command, generating dummy data that is one of pseudo-random data, all one values, or all zero values; and
causing the dummy data to be programmed to memory cells of multiple sub-blocks of the plurality of sub-blocks that are selectively connected to the retired wordline.