| CPC G06F 3/046 (2013.01) [G02F 1/13338 (2013.01); G06F 1/1618 (2013.01); G06F 1/1641 (2013.01); G06F 1/1647 (2013.01); G06F 3/03545 (2013.01); G06F 3/038 (2013.01); G06F 3/0412 (2013.01); G06F 3/04162 (2019.05); G06F 3/0445 (2019.05); G06F 3/04166 (2019.05); G06F 3/0441 (2019.05); G06F 2203/04102 (2013.01); G06F 2203/04106 (2013.01); G09G 2300/023 (2013.01); G09G 2300/0426 (2013.01)] | 17 Claims |

|
1. An electronic device comprising:
a first housing;
a second housing foldably combined with the first housing through a hinge device;
a display panel disposed to be supported by the first housing and the second housing; and
a digitizer disposed under the display panel, the digitizer comprising a first digitizer disposed at a position corresponding to the first housing and a second digitizer disposed at a position corresponding to the second housing,
wherein each of the first digitizer and the second digitizer comprises:
a dielectric sheet,
a plurality of first conductive patterns disposed in a first layer of the dielectric sheet and arranged at a predetermined interval to have a length in a first direction, and
a plurality of second conductive patterns disposed in a second layer of the dielectric sheet different from the first layer and arranged at a predetermined interval to have a length in a second direction different from the first direction,
wherein a thickness of the plurality of second conductive patterns is relatively thicker than that of the plurality of first conductive patterns,
wherein the plurality of second conductive patterns are used as Tx channels of the digitizer,
wherein the plurality of second conductive patterns are disposed at a position farther from the display panel than the plurality of first conductive patterns,
wherein the digitizer includes a connector portion electrically connected to the plurality of first conductive patterns and the plurality of second conductive patterns, the connector portion being extended outwardly from the dielectric sheet,
wherein the connector portion is electrically connected to a substrate in the electronic device,
wherein a plurality of first channels are formed through the plurality of first conductive patterns and a plurality of second channels are formed through the plurality of second conductive patterns,
wherein each of the plurality of first channels includes a first conductive line and a second conductive line spaced apart from the first conductive line,
wherein one end of the first conductive line and one end of the second conductive line are electrically connected to each other via a first sub-line disposed on the second layer,
wherein each of the plurality of second channels includes a third conductive line and a fourth conductive line spaced apart from the third conductive line, and
wherein one end of the third conductive line and one end of the fourth conductive line are electrically connected to each other via a second sub-line disposed on the first layer.
|