CPC G06F 12/0862 (2013.01) [G06F 12/0875 (2013.01); G06F 2212/6022 (2013.01)] | 13 Claims |
1. A data processing apparatus comprising:
prefetch circuitry configured to generate a prefetch request for a cache line prior to the cache line being explicitly requested, wherein the cache line is predicted to be required for a store operation in the future;
issuing circuitry to issue the prefetch request to a memory hierarchy; and
filter circuitry configured to filter out the prefetch request based on at least one other prefetch request made to the cache line, to control whether the prefetch request is issued by the issuing circuitry,
wherein the filter circuitry is configured to filter out the prefetch request based on an amount of the cache line that is required by the at least one other prefetch request made to the cache line.
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