US 12,141,016 B2
System on a chip that drives display when CPUs are powered down
Ramana V. Rachakonda, Austin, TX (US); Rohit K. Gupta, Santa Clara, CA (US); Brad W. Simeral, San Francisco, CA (US); and Peter F. Holland, Los Gatos, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Sep. 28, 2023, as Appl. No. 18/476,547.
Application 18/476,547 is a continuation of application No. 17/934,976, filed on Sep. 23, 2022, granted, now 11,822,416.
Application 17/934,976 is a continuation of application No. 17/015,288, filed on Sep. 9, 2020, granted, now 11,500,448, issued on Nov. 15, 2022.
Prior Publication US 2024/0094797 A1, Mar. 21, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/32 (2019.01); G06F 1/3228 (2019.01); G06F 1/3287 (2019.01); H04B 17/318 (2015.01)
CPC G06F 1/3287 (2013.01) [G06F 1/3228 (2013.01); H04B 17/318 (2015.01)] 20 Claims
OG exemplary drawing
 
1. A wearable device, comprising:
display controller circuitry configured to read frames from a memory and process the frames for display on a display device;
processor circuitry configured to store frames in the memory for display;
interconnect circuitry coupled to the display controller circuitry and the processor circuitry, and memory controller circuitry for the memory; and
power management circuitry configured to operate the device in a first power state of multiple power states supported by the device, wherein in the first power state:
at least a portion of the interconnect circuitry is powered down;
at least a portion of the processor circuitry is powered down and the processor circuitry is not configured to provide frames to the memory; and
the display controller circuitry is configured to:
modify a frame from the memory based on one or more dynamic content locations identified for the frame; and
display multiple prerendered frames on the display device from the memory, including the modified frame.