US 12,140,928 B2
System and server apparatus for generating route information for target moving terminals
Tomoya Tandai, Ota Tokyo (JP); Toshihisa Nabetani, Kawasaki Kanagawa (JP); Koji Akita, Yokohama Kanagawa (JP); Miyuki Ogura, Tachikawa Tokyo (JP); and Ryoko Matsuo, Shinagawa Tokyo (JP)
Assigned to KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed on Aug. 30, 2023, as Appl. No. 18/240,242.
Application 18/240,242 is a division of application No. 17/195,473, filed on Mar. 8, 2021, granted, now 11,880,186.
Claims priority of application No. 2020-146839 (JP), filed on Sep. 1, 2020.
Prior Publication US 2023/0409005 A1, Dec. 21, 2023
Int. Cl. G05B 19/414 (2006.01); H04W 56/00 (2009.01); H04W 64/00 (2009.01)
CPC G05B 19/414 (2013.01) [H04W 56/001 (2013.01); H04W 64/006 (2013.01); G05B 2219/33192 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A system capable of communicating with a terminal, comprising:
a processor configured to generate a first control signal including a first target position to operate at least part of a the terminal and generate a second control signal including a second target position to operate at least the part of the terminal after an operation of the at least the part of the terminal in accordance with the first target position; and
a transmitter configured to transmit the first control signal to the terminal at a first timing and transmit the second control signal to the terminal at a second timing after the first timing,
wherein:
the processor is configured to set the first target position to be farther than a position which the at least the part of the terminal is to reach at the second timing;
the processor is configured to generate a third control signal including a third target position to operate the at least the part of the terminal after the operation of the at least the part of the terminal in accordance with the second target position;
the transmitter is configured to transmit the third control signal to the terminal at a third timing after the second timing; and
the processor is configured to set the first target position to be identical with or closer than a position which the at least the part of the terminal is to reach at the third timing.