US 12,471,506 B2
Phase-change memory cell with reduced heater size
Kangguo Cheng, Schenectady, NY (US)
Assigned to International Businesss Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Mar. 10, 2022, as Appl. No. 17/654,269.
Prior Publication US 2023/0292637 A1, Sep. 14, 2023
Int. Cl. H10N 70/20 (2023.01); H10N 70/00 (2023.01); H10B 63/00 (2023.01)
CPC H10N 70/231 (2023.02) [H10N 70/826 (2023.02); H10N 70/8413 (2023.02); H10N 70/8613 (2023.02); H10B 63/84 (2023.02); H10N 70/023 (2023.02); H10N 70/043 (2023.02); H10N 70/063 (2023.02); H10N 70/066 (2023.02); H10N 70/068 (2023.02); H10N 70/841 (2023.02); H10N 70/8828 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first conductive structure within a first dielectric layer;
a heater element within a second dielectric layer disposed above the first conductive structure, the heater element including a third dielectric layer defining a perimeter, a top portion of a heater material layer partially overlapping the perimeter of the third dielectric layer, and a bottom portion of the heater material layer overlapping the perimeter of the third dielectric layer, the bottom portion of the heater material layer being in contact with the first conductive structure, wherein the top portion of the heater material layer has a partial ring shape and the bottom portion of the heater material layer has a full ring shape;
a phase-change material being positioned above the heater element, a partial ring shape portion of the top portion of the heater material layer being in contact with a bottom surface of the phase-change material, wherein the phase-change material is doped with at least one dielectric material; and
a second conductive structure being positioned above the phase-change material.