US 12,471,489 B2
Manufacturing method of display device
Yuya Yamamoto, Tokyo (JP); Nobuo Imai, Tokyo (JP); and Hiroshi Ogawa, Tokyo (JP)
Assigned to MAGNOLIA WHITE CORPORATION, Tokyo (JP)
Filed by Magnolia White Corporation, Tokyo (JP)
Filed on Feb. 8, 2023, as Appl. No. 18/165,978.
Claims priority of application No. 2022-018014 (JP), filed on Feb. 8, 2022.
Prior Publication US 2023/0255097 A1, Aug. 10, 2023
Int. Cl. H10K 71/60 (2023.01); H10K 71/00 (2023.01); H10K 71/20 (2023.01)
CPC H10K 71/60 (2023.02) [H10K 71/231 (2023.02); H10K 71/621 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A manufacturing method of a display device, the method comprising:
forming a lower electrode above a substrate;
providing a processing substrate in which the lower electrode is formed, on a stage inside a chamber, forming a first insulating layer overlapping the lower electrode in a state where a first distance is formed between the stage and a counter-electrode, and subsequently forming a second insulating layer on the first insulating layer in a state where a second distance greater than the first distance is formed between the stage and the counter-electrode;
forming a rib comprising an aperture overlapping the lower electrode by patterning the first insulating layer and the second insulating layer;
forming a partition comprising a lower portion located on the rib, and an upper portion located on the lower portion and protruding from a side surface of the lower portion;
forming an organic layer including a first organic layer located on the lower electrode and spaced apart from the lower portion of the partition, and a second organic layer located on the upper portion, the first and second organic layers including light emitting layers formed of a same material;
forming an upper electrode including a first upper electrode which is located on the first organic layer and is in contact with the lower portion of the partition, and a second upper electrode located on the second organic layer;
forming a cap layer including a first cap layer located on the first upper electrode, and a second cap layer located on the second upper electrode; and
forming a sealing layer which covers the first cap layer and the second cap layer.