US 12,471,465 B2
Display panel and display apparatus
Huiping Chai, Wuhan (CN); Gaojun Huang, Wuhan (CN); and Lin Zhang, Wuhan (CN)
Assigned to Wuhan TianMa Microelectronics Co., Ltd., Wuhan (CN); and Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch, Shanghai (CN)
Filed by WUHAN TIANMA MICRO-ELECTRONICS CO., LTD., Wuhan (CN); and Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch, Shanghai (CN)
Filed on Jan. 24, 2024, as Appl. No. 18/421,438.
Claims priority of application No. 202310162416.2 (CN), filed on Feb. 22, 2023.
Prior Publication US 2024/0164162 A1, May 16, 2024
Int. Cl. G09G 3/00 (2006.01); G09G 3/3225 (2016.01); H10K 59/131 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3225 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/08 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A display panel, comprising: a substrate, gating lines, a power line and pixels, wherein the gating lines and the pixels are located on a side of the substrate, wherein:
the gating lines extend in a first direction, a pixel of the pixels comprises a pixel circuit, the pixel circuit comprises a functional transistor, the functional transistor comprises a patterned conductive structure, and a gate of the functional transistor is located in the conductive structure,
the conductive structure is electrically connected to a gating line of the gating lines through a via, and a sheet resistance of a layer where the gating line is located is lower than a sheet resistance of a layer where the conductive structure is located,
the power line extends in a second direction, the second direction intersects with the first direction, wherein the pixel circuit is electrically connected to the power line, and a layer where the power line is located is on a side of the layer where the gating line is located away from the substrate,
the pixel circuit comprises a second transistor, and an active layer of the second transistor contains metal oxide, and
in a direction perpendicular to a plane where the substrate is located, the power line covers the second transistor.